Associate Professor, Department of Electrical and Computer Engineering and Department of Cyber Security Engineering
Contact Information
Campus: Fairfax
Building: Nguyen Engineering Building
Room 3222
Mail Stop: 1G5
Personal Websites
Biography
Jens-Peter Kaps joined Mason after he received a PhD in Electrical and Computer Engineering from Worcester Polytechnic Institute in 2006. He is a co-director of the Cryptographic Engineering Research Group (CERG) at the Volgenau School of Engineering. His research interests include ultra-low-power cryptographic hardware design, side-channel analysis, computer arithmetic, efficient cryptographic algorithms, and ubiquitous computing. He was the general co-chair for the Cryptographic Hardware and Embedded Systems Conference (CHES) in 2008 and the general chair for the Special-purpose Hardware for Attacking Cryptographic Systems (SHARCS) workshop in 2012. Kaps is a member of the IEEE Computer Society and the International Association for Cryptologic Research (IACR).
Research
2018 - 2022: Countermeasures Against Side-Channels Attacks Targeting Hardware and Embedded System Implementations of Post-Quantum Cryptographic Algorithms. Funded by the National Science Foundation.
2018-2021: Lightweight Cryptography in Hardware and Embedded Systems. funded by the U.S. Department of Commerce (NIST).
2018 - 2021: Post-Quantum Cryptography in Hardware and Embedded Systems. Funded by the U.S., Department of Commerce (NIST).
2015 - 2018: Post-Quantum Public Key Cryptosystems. Funded by the Department of Commerce (NIST)
2013 - 2017 : TWC: Option: Medium: Collaborative: Authenticated Ciphers. Funded by the National Science Foundation.
2014 - 2014: Physical Unclonable Functions (PUFS) for Unique and Robust Encryption Key Generation. Funded by McQ Inc.
2013 - 2014: Fault Analysis of Android Devices. Funded by Riscure.
Logical Vanishability through Hybrid STTLUT Technology to Prevent Reverse Engineering. Funded by the Air Force Research Laboratory
Research Interests
Cryptographic Engineering, ultra-low power cryptographic hardware design, side-channel analysis, computer arithmetic, efficient cryptographic algorithms
Degrees
- PhD, Worcester Polytechnic Institute
- MS, Worcester Polytechnic Institute
- BS, Munich University of Applied Sciences